
module riscv_ssd(
    CLK_50M,
    RST_N,
    lvl0_data,
    lvl1_data,
    lvl2_data,
    lvl3_data,
	SEG_DATA,
    SEG_EN
);

input 			CLK_50M;					
input			RST_N;
input	 		[ 3:0]		lvl3_data;			
input	 		[ 3:0]		lvl2_data;			
input	 		[ 3:0]		lvl1_data;		
input	 		[ 3:0]		lvl0_data;			
output reg 	[ 3:0] 		SEG_EN;				
output reg 	[ 7:0] 		SEG_DATA;			


reg			[26:0]		time_cnt;			
reg			[26:0]		time_cnt_n;			
reg			[ 2:0]		led_cnt;					
reg			[ 2:0]		led_cnt_n;				
reg 			[ 3:0]		led_data;				

parameter SEC_TIME = 16'd50_000;	

always @ (posedge CLK_50M or negedge RST_N)  
begin
	if(!RST_N)										
		time_cnt <= 27'h0;							
	else
		time_cnt <= time_cnt_n;						
end


always @ (*)  
begin
	if(time_cnt == SEC_TIME )						
		time_cnt_n = 27'h0;							
	else
		time_cnt_n = time_cnt + 27'h1;			
end


always @ (posedge CLK_50M or negedge RST_N)  
begin
	if(!RST_N)											
		led_cnt <= 3'b0;							
	else
		led_cnt <= led_cnt_n;					
end

always @ (*)  
begin
	if(time_cnt == SEC_TIME )					
		led_cnt_n = led_cnt + 1'b1;				
	else
		led_cnt_n = led_cnt;						
end

always @ (*)
begin
	case(led_cnt)
		0 : led_data = lvl3_data;			
		1 : led_data = lvl2_data;			
		2 : led_data = lvl1_data;				
		3 : led_data = lvl0_data;				
		default: led_data = 4'hF;					
	endcase
end

always @ (*)
begin
	case (led_cnt)  	
		3'b000 : SEG_EN = 6'b111110;	
		3'b001 : SEG_EN = 6'b111101;	
		3'b010 : SEG_EN = 6'b111011; 
		3'b011 : SEG_EN = 6'b110111;
		default: SEG_EN = 6'b111111;				
	endcase 	
end

always @ (*)
begin
	case (led_cnt)  
		3'b000 : SEG_DATA[7] = 1'b1;  			
		3'b001 : SEG_DATA[7] = 1'b1;	  			
		3'b010 : SEG_DATA[7] = 1'b1; 			
		3'b011 : SEG_DATA[7] = 1'b1;  				
		3'b100 : SEG_DATA[7] = 1'b1; 					
		3'b101 : SEG_DATA[7] = 1'b1; 				
		default : SEG_DATA[7] = 1'b1;			
	endcase 	
end

/*
1010    1110111	A
        0001000
1011	1111100	B
        0000011 
1100	0111001	C
        1000110
1101	1011110	D
        0100001
1110	1111001	E
        0000110
1111	1110001	F
        0001110
*/

always @ (*)
begin
  case(led_data)
		0  : SEG_DATA[6:0] = 7'b1000000;
		1  : SEG_DATA[6:0] = 7'b1111001;  		
		2  : SEG_DATA[6:0] = 7'b0100100;   		
		3  : SEG_DATA[6:0] = 7'b0110000;   		
		4  : SEG_DATA[6:0] = 7'b0011001;  		
		5  : SEG_DATA[6:0] = 7'b0010010;   		
		6  : SEG_DATA[6:0] = 7'b0000010;   		
		7  : SEG_DATA[6:0] = 7'b1111000;   		
		8  : SEG_DATA[6:0] = 7'b0000000;   		
		9  : SEG_DATA[6:0] = 7'b0010000;  		
		10 : SEG_DATA[6:0] = 7'b0001000;   	
		11 : SEG_DATA[6:0] = 7'b0000011;   		
		12 : SEG_DATA[6:0] = 7'b1000110;   		
		13 : SEG_DATA[6:0] = 7'b0100001;   		
		14 : SEG_DATA[6:0] = 7'b0000110;   		
		15 : SEG_DATA[6:0] = 7'b0001110;   		
		default :SEG_DATA[6:0] = 7'b0111111;	
  endcase
end

endmodule

